Bus overview
Bus types
Buses and Ports
Bus arbitration overview
Data transfer
A/Synchronous
Control Bus
Bus basics and function
  Bus - used to connect logic units or devices.
    Internal to CPU.
      Data-path

    Between CPU and other logic circuits or peripheral interfaces.
      local bus, system bus, expansion bus.

    Between computer and external devices.
      Ethernet

  Protocol 
    Set of rules that describe the behavior of the bus.  
    Needed to allow different manufacturers to produce standardized circuits. 

Bus types by function
  Address - used to recognize and activate a desired unit.
  Data - used to pass data between units.
  Control - used to ensure the proper functioning of bus activities.

  Power - provides power to units

Ports and Buses
  Port - physical or logical point to point interface between system 
    device.  More likely used when there is an external one to one 
    connection.

  Slot - usually one of several (internal) physical interfaces onto bus system. 
    Slots often identical or with small variations to distinguish each.
  
  Point to point - connects a single device to the system.
    Addressing often not supported or limited.
    Minimal controls for particular type of device (printer port).
    May provide only uni-directional data movement.
    Port interface responsible for controlling port lines (master).

  Multi-point bus - connects multiple devices with single set of shared lines.
    Must provide facilities to distinguish devices (addressing).
    Must provide sufficient controls to ensure proper functioning.
    Must provide bi-directional data movement.
    Support circuitry independent of devices using it.

Bus Arbitration.
  Bus is a passive device.

  When being used, single master must initiate action.
    Master may interact with one or more "slave" devices.

  In early designs, CPU was the only master.

  Newer designs allow multiple masters to optimize system usage.
    CPU - one or more.

    DMA - direct memory access (between memory and hard drive)

    Floating point Unit. (customized Co-processor CPU)

In order to control which master is master
  Arbitration
    Daisy chain - priority design. If highest priority master not 
      interested, next master device allowed to act. Not fair.

    Centralized parallel - each master requests control from separate
      arbiter.  Fair but bottlenecks occur.  
   
    Distributed using self-selection - like centralized except master 
      devices able to determine priority. 
  
    Distributed using collision detection - each device attempts to 
      use bus. If conflict (collision), protocol guides to resolution.
      Ethernet uses this. If too many devices, logjam can occur.

Speed and width - two properties that affect amount of information transferred.
  Speed - number of clock cycles per second.
    Kilohertz KHz    1 * 10^3 cycles/sec
      external devices, modem.
    Megahertz (mu)Hz 1 * 10^6 cycles/sec  
      early PC CPUs.
    Gigahertz GHz    1 * 10^9 cycles/sec 
       current CPUs.

  Width - number of address and data lines.
    Address - amount of primary data directly addressable.
      20 bit = 2^20 1 Megabyte Original IBM PC.
      32 bit = 2^32 4 Gigabytes - current CPUs.
     
    Data - amount (size) of data transferred at one read/write access. 
      2^8 - 8 bit bytes 2^8 0-255 (IBM PC, Apple, Commodore)
      2^16 - 16 bit word 2^16 0-65535 - 8086 CPU 
      2^32 - 32 bit word 2^32 (current Pentium CPUs)   

Bus classes
  Synchronous bus 
    Clock is provided to signal boundaries of state changes.
      When changes on various bus lines (@, data and control) are valid.

    Simplifies control and interaction between devices.

    Requires that devices function in a defined synchronous order.

  Asynchronous bus
    No clock.

    Additional control signals needed to guarantee proper interaction.

    Devices interact only when and if necessary.

    Timing information often embedded in data (lowers data throughput).
      Or synchronization data needed at regular intervals.
      Or hand shaking needed after each transaction.

Control bus
  Control bus provides a variety of signals that provide for proper 
    interaction of units.

  Common controls (not all found on all systems).
    Data direction - specified the direction of data movement between master
      and slave.

    Memory/IO - indicates whether address specified identifies primary
       memory or an I/O device.

    Bus arbitration (request/grant)- provides correct interaction on
      multi-master systems.

    Status - used by slave units to indicate their current state or 
      acknowledge interaction with master.  

    Interrupt - used to request the attention from master.

    Clock - provides for synchronization of system.

    Misc - example - reset - causes the system to reboot.