RISC - Reduced instruction set computer.
  Also called load/store architecture

  Newer design - tends not to have to deal backward compatibility
    (fewer older obsolete instructions or programming modes)

  Limited overall number of instructions.

  Instructions perform only a few simple actions.

  Many general purpose registers
    often using register file (128 registers or more), keeping separate sets 
    of register, up to 32 at a time, for each process or subroutine.
   
    Some of these register sets overlap, allowing variables to be passed
      beween routines.

  All instructions (opcode/operand) one standardized size.

  Complete instruction read in one access. 

  Data bus size or whole multiple of instruction size.

  High level language compilers take the burden of many steps off of the
    programmer.