NOP (sequential execution)
  In effect, this instruction has no operand or effective address.
    Used as a place holder in code or to stall fetch/execute cycle.
    Does nothing, so there is nothing to perform it on. 

  Commonly found coupled with Branch tests to allow completion of test.
    Very common in RISC architecture code.  
    Like putting an extra car length between you and driver ahead of you.
 
Implied
  Effective address implied by the opcode itself.
    No additional operands needed.
    May be considered as immediate by some ISA designs.

  Usually involves modifying or testing data internal to the CPU.
  Example.
   6502: SEC - set carry - 1 byte opcode that sets the carry flag in CC register.
         PHA - pushes the accumulator onto the stack. Both accumulator and 
           stack are implied by the 1 byte opcode. 
   
   8086: INTO - interrupt on overflow.
         AAS - ASCII adjust for subtraction.  Adjusts results of previous
           unpacked decimal subtract.  Applied to AL register.