Addressing mode / Effective addressing (EA)
  How operand[s] specify location of data of interest.

  Instructions operands generally specify a source and a destination target 
    for the data being processed.
 
  Number of operands expressed in an instruction can be as few as 0
    or more than 4, with 2 (or 3 for RISC) being most common.

  There may not be a correlation mumber of operands and size of instruction.

  Also, instruction operands involve at least 1 CPU register.  
    It may be implied or specified depending on CPU design. 
    It may be source or destination or act as a pointer to memory target.

    i.e  It is difficult to have a memory location as both source and
    destination of an instruction without involving a register.

  Following categories are generic, instructions may fall into more than one.
    And many CPU manufacturers have there own definition of effective address
    modes.

  Variety of simple addressing modes can be combined to form more
    complex addressing schemes.

  Wikipedia topic : Effective Address
  The wikipedia page also breaks this down further :
    code instructions - such as jump, branch, subroutine call.
    data instructions - accessing data in registers and memory.