Effective addressing (ea)
  Location of data of interest specified by operand.

  Generally, most instructions will involve at least 1 cpu register.
    It may be implied or specified depending on design.

  Determining which additional registers, memory or other data sources
    provide access to data is the function of effective addressing.

  Following categories are generic, instructions may fall into more than one.

  Variety of simple addressing modes can be combined to form more
    complex addressing schemes.

Implied
  Effective address implied by the opcode itself.
    No addtional operands needed.

  Usually involves modifying or testing data internal to the cpu.
  Example.
   6502: SEC - set carry - 1 byte opcode that sets the carry flag in ccr.
   8086: INTO - interrupt on overflow.
         AAS - ascii adjust for subtraction.  Adjusts results of previous
           unpacked decimal subtract.  Applied to AL register.  

Stack
  Effective address involves a specifically reserved block of memory used 
  as a scratch area accessed in a first in, last out format.

  In some implementation, may be viewed as an advanced form of implied.
    6502: PHA - push accumulator contents onto stack.  1 byte. 

  Others support several compound addresssing modes.
    8086: POP {work register or memory or segment register (except CS)}
 
  May involve complex or multiple actions. 
    Automatic adjustment of stack pointer with data store or retrievial.

    Single instruction may perform multiple pushes or pops.
      Execution transfer to subroutines or interrupt handing. 

    6502: JSR $2000 - set program counter to 2000 after storing current 
      2 byte contents of program counter on stack.

    6502: RTS - pops the top 2 bytes off of stack and puts them into the
      program counter.

  Some systems do not support stack commands at all or at user level.
    IBM 360 standard linkage substitutes stack commands with a user
      implemented routine. 

Immediate
  Operand is the data to be provided to cpu.
    Contents of program counter is the effective address.

    6502: LDA #42

  Data is immediately available upon fetch of operand.

  By default, data is read only.

  Not all systems support Immediate mode.

  But often can be simulated
    IBM360: LA R1,4(0,0) - simulated

Register
  Effective address is the named register(s).

  Data activity usually involves 2 registers.

  All action occurs within the cpu.
  Example
    IBM360: L R1,R2

  Very fast access to data.

  May conceptually overlap with implied  
    6502: TAY (transfer A to Y) can be also viewed as an implied because
      complete instruction is 1 byte opcode. 

Direct
  Effective address is a memory location specified by the operand.

  Value absolute (unsigned) memory address.

  Some systems may further separate instruction into sub-classes.
    Zero page (or near) - 1 byte operand (1st 256 addresses of memory)
      6502: LDA $42

      IBM360: L R1,42(0,0) (4096 range) - simulated.

    Absolute - size of address register (segment size).
      May or may involve additional implied registers.

      6502: LDA $2403 - different opcode than zero page version.
      8086: RCL MEMOLOC,1 - rotate through carry left, absolute address 
        operand combined with an immediate operand. Segment register implied. 

    Far (8088) - operand specifies full address. 
      8086: JMPF SEGID:ADDRESS

  May take multiple memory accesses just to build the desired E.A.
     which still must be accessed.

  Makes relocating code difficult. 

Relative
  Effective address is built by adding the operand to the program counter.
    (How far from here?)

  Usually implemented in conditional and unconditional branches.

  Often a signed value.

  6502: BEQ HERE - HERE is 8 bit value found by compiler by subtracting
    the @ of BEQ's operand fro the address of HERE.

  Range of adjustment is often smaller than possible @ range.
    Signed 1 byte or 2 byte offset value even though 20-32 bit address range.

  Its big advantage is that code is relocatable in memory.

  Some systems revert to absolute addresses for very large distances
    (supported by compiler).

Indirect
  Two forms - Memory and Register

  The register or memory specified in operand contains the effective
    address to be accessed.

    6502: JMP($2000)

    8086: CALL AX 

  Basically a pointer to memory of interest.

  Requires multiple memory accesses to arrive at data based on data
    bus size.

  Very flexible addressing.

  Most often combined with other modes for increased flexibility.

    6502: LDA ($42),y  indiect, indexed.  Get address at $42, add index.
    6502: LDA ($42,x)  indexed, indexed.  Get address at $42 + x.

  When used with a register, often reffered to as a Base pointer.      

Indexed
  Effective address is found by adding the contents of a specified index
    register to an address specified in the operand.

  Value is usually unsigned.

  Range is often less than possible address range.
    6502: LDA $2000,x  - 8 bit (256)

  Usually part of a more complex addressing mode.

  Some isa architectures allow 2 or more pointer to be combined and will
  calling one the base and the other the index although they may be 
  interchangeable.  L R1,23(R2,R3)  Interchangable and full address range.

Scaled - form of indexing.
  Effective address is found by adding the contents of a specified index
    register multiplied by a constant to an address specified in the operand.

  Supposed there is an array of 4 byte values.  With standard indexing, index
  must be adjusted by 4 bytes each time.

  With scaling, index incremented by 1 but EA = Start @ + (index * 4).

Displacement 
Effective address is found by adding a value specified in the operand to
    the address stored in a named register.

  Value is usually unsigned.

  Range is usually less than possible address range.
    IBM 360: L R1,23(R4,R2) - 12 bit (4096) displacement

  Usually part of a more complex addressing mode.
    Above example is register indirect(base), indexed, with displacement.