IBM 360


Source : https://en.wikipedia.org/wiki/IBM_System/360_architecture

  Multi-user/multi-tasking.
  Indirect memory addressing to simplify code/data placement in memory.
    Direct addressing accomplished via displacement.
    L 48(0,0) # register 0 treated as zero when used as base or index.
    Only 1st 4KiB of memory directly addressable and is OS protected.

  32-bit word, big endian (later 64 bit, IBM 390 - z-OS)

  24 bit addressing (3 byte) = 16 MB IBM 360
  31 bit addressing (4 byte) = 2 GiB  IBM 370-390
  64 bit addressing  - Z/OS series.
    Supports 64-bit addressing for both code and data.
 
  Runs in a virtual environment - may actually run on systems with more
    memory.

  16 General purpose registers 
    Highly orthogonal - most instructions don't care which registers used.

    Only 1-15 truly general.
    * R0 has special rule when used as an address register 
      - always treated as zero.

    By tradition, certain registers used for certain tasks. 
      R15 - holds address of sub-routine
      R14 - holds return address
           balr R14,R15

      R13 - pointer to save area
      R1  - used to pass a single parameter or pointer to parm. list.
      R0  - used for return code.

  NO stack pointer - programmers use standard linkage to implement a 
    type of software based stack.

  4 Floating point register pairs R0,R1 R2,R3 R4,R5 R6,R7
   - 32 bit short, 64 bit, or addressed as 128 bit even/odd pairs.

  64-bit Program status word - is a combination of condition code register,
  instruction pointer, and program status register.

    Channel masks - masks/selects requests from channel I/O, which are 
      run by co-processor chips that handle (hard drive) I/O and share 
      system resources.

    External mask - masks interrupts from other external devices.

    Protection key - used to protect blocks of memory in multi-tasking systems.
      When active, key of memory holding instruction must match key assigned 
      to memory block being accessed.

    BC/EC mode - indicates if program is running in 24 bit legacy mode
    or newer 31 bit mode.

    Machine check mask - masks or accepts hardware problem interrupts.

    Wait state - pauses/flags CPU while waiting for channel devices to respond.
    (Improper use of flag can lock up machine.)

    Problem state - indicates supervisor (OS) or problem (user's program).
      Allows or restricts execution of certain instructions.

    Interrupt code - records a software interrupt ID code generated.
      e.g Soc 4.

    Instruction length code - length of instruction just executed.
      IBM 360 supports 2, 4, 6, and 8 bit instructions.

    Condition code - 4 bits wide - used to flag various numeric conditions,
       zero, greater, less, overflow, etc.

    Program masks - masks user handle-able interrupts. Fixed point overflow,
      decimal overflow, exponent underflow, significance.

    Instruction address (24 or 31 bit program counter) 


    Newer Z-OS doubled PSW and has a 64-bit instruction address.

Recognizes 2, 4, 6, and 8 byte instruction lengths. 

Heavily depends on indirect (pointer style) addressing.

Strong support for multi-user, multi-tasking, high reliance on indirect
addressing allows tasks to be swapped in and out of different places in
memory.


370 - support of 31 bit address range, 2GB
    - supports older 360 address range and code design

390 - support of 31 bit address range, 2GB
      Improved I/O architecture.
    - supports older 360 24-bit address range and code design
    - supports additional primary memory set up as 4K pages that
      can be swapped in and out - virtual memory using real memory.
    - supports LPAR (logical partitions) capable of running different
       OSes concurrently.

zOS - 64 bit address range.
    - supports both 24-bit(360) and 31-bit(370) address and code.