Registers - Used as scratch or holding area for the assigned tasks.

Invisible - used internally to complete the tasks at hand. 
  Temp registers.
  Register file - array of register sets that can be assigned to specific 
    task providing for more efficient task swapping. Only a small sub-set
    are actually visible to program.
  Cache support.
  Virtual memory support - invisible to program, visible to OS.
  
  In some cases, the OS instructions may see these.
  In other case, just the CPU logic circuits know about them.
      
Visible - registers either directly or indirectly accessible to the 
  user via the instruction set architecture of the specific CPU.

Addressing type registers
  MAR - memory address register used to hold memory address being accessed.

  Segment - (or bank) used to expand the address range and/or treat a block
    of memory as a working unit. Extension of the MAR. Not used in all CPU
    designs. Disappearing as user accessible registers as more CPUs go to 
    linear addressing but may be used in virtual memory control. 

  PC - program counter indicates next instruction to be executed. May also
    be called IP - instruction pointer.

  SP - stack pointer points to a memory scratch area, first in last out.
    Not implemented on all CPUs.

  Other - custom registers for addressing memory for specific
    task or instruction. CPU architecture specific.

Functional
  MDR(MBR) - memory data(buffer) used to move data between CPU and data bus.
    Determines/limits size of single read/write.

  IR - instruction register holds current instruction (op-code) being decoded.

  Index and Counter registers - 
    index or offset when combined with a memory address. (pointer)
    counter used with specific commands or for specific functions.

  Accumulator - values accessed primarily by ALU. May be paired. One may 
    always hold low value of result and another holds high.

  Floating point - values accessed by separate ALU and custom instructions. 

  CC - Condition code or status register.
    Flags record the result of action, influences action of the CPU, or both.
    Different CPU designs have different numbers and types of flags.

  GPR - General purpose registers used to hold data being manipulated,
    all register have equal status. 1 minimum   128 in a RISC CPU

    Some CPU designs allow a register to be both a GPR and a special purpose
    register.