The make utility is normally used to maintain large software projects, that is, projects with several source and header files, typically in C or C++, on a UNIX or Linux system. (Even in other languages on other platforms, the same kind of work needs to be done using a similar utility or an IDE.)

The utility reads makefile, makes decisions, and carries out commands.

Format for using make

The format for using it is:

         make

or

         make target-name

where "target-name" is a label in a file called makefile or Makefile. (If no target is indicated, the default is the first target in the file.)

The format for an entry in a makefile is normally something like this:

target : dependency-list 
         commands

where the lines of commands begin with a Tab character. Normally:

• target is the name of a file we would like to create (an object file or executable file)

• dependency-list is a list of files involved in creating the target (object files, source code files, or header files)

• commands are what we need to create the target (compile or link)

Blank lines are ignored.

Each command line begins with a TAB character, not simply some number of spaces.

To break up a long line into multiple lines, put a backslash ('\') at the end of each line (just before the actual end of the line) except the last.

What does it do?

The processing here is that the utility checks the file-creation date of target and the file-modification dates of the files in the dependency list. If any of the files have changed since target was created, then the commands are executed. However, the files in the dependency list may also be targets, and each of them will also be checked (and recreated as needed) first. With a large makefile, this may be a long process.

The make utility will do the minimum amount of work needed to create the target file. This may include recompiling some of the files if they have changed recently.

One way to force a complete rebuild--recompiling everything--is to use the LINUX "touch" command to change the time-and-date stamp on the files involved.

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Options

It is possible to invent our own name for the input file instead of makefile, but we don't have to do so. To use another name:

         make -f filename target

This will now use "filename" instead of "makefile".

Most targets are the names of files we want to produce by compiling or linking. We can also have targets with no dependency list, in which case all the commands will be executed. These are called dummy targets. For instance, we could have:

clean : 
        - rm *.o

If we then use

         make clean

the result is to have all the object files deleted.

It is possible to invent other uses of the make utility with dummy targets.

We can use variables in a make file. Two standard variables are CC and CCFLAGS. We define these at the top and use them as $(CC) and $(CCFLAGS). Technically these are called macros. The format is:

         name=string

To use this, we would refer to $(name). Each occurrence of "name" would be replaced by the string.

We can include comments in a make file. Anything following a "#", up to the end of the line, is a comment.

The make utility has a good number of options aside from what is described here.