Lectures
Ways of storing data in primary memory.
Hard-wired - read only memory - Early ROM Bios.
"Rewirable" hard-wired - Re-programmable ROM (EPROMs, flash) - current bios.
Magnetic - core memory - obsolete.
Using semiconductor fabrication techniques
https://en.wikipedia.org/wiki/Magnetoresistive_random-access_memory
Flip-flops - read/write - registers in CPU.
CMOS gates - read/write - newer low power CPU registers,
low power static RAM (SRAM), CMOS memory.
Capacitors - read/write - DRAM. Most primary memory in system, cheap,
very small cells, large quantities on a chip.
size :
Early 80's 12um.
Currently 45nm. (approx 1/500)
Primary memory properties
Memory that hold code and data currently being processed.
Volatility - whether the contents are lost when power is removed.
Non-volatile - ROM, Magnetic Core (expensive), Flash - (thumb drives,
camera memory).
Magnetic core - size and cost has obsoleted it for most uses.
Volatile - Most current read/write (RAM) memory. CMOS memory - low
power draw allows simulation of non-volatile with battery power.
Destructive access - whether contents are lost when read.
Non-destructive - CMOS flip-flop memory, ROMs, flash.
Destructive - DRAM, magnetic core.
requires additional time and resources to refresh.
Static (SRAM) v.s. Dynamic (DRAM) RAM.
https://computer.howstuffworks.com/question452.htm
Static RAM.
General Technology.
Flip-flop or paired gates.
Each cell complex and large especially CMOS (low density).
4-6 transistors per bit.
Often arranged as 8 bit or 16 bit wide units on single chip.
Chip 64KiB common.
Properties
+ Fast reads.
+ Very low power when implemented as CMOS.
- Expensive.
Use.
Storage for small amounts occasionally changed data, such as
user specified system configuration and system level passwords.
CPU cache and registers.
Dynamic RAM.
General Technology.
Capacitor arranged in a rectangular grid.
Simple small cells (dense).
Data destroyed when accessed.
Requires refresh even if data not accessed.
Individual bits of byte spread across several chips or sub-units on
a chip.
Properties
+ Small size - very dense.
+ Economical.
- refresh required after read and slows subsequent read on row.
- regular refreshes required even if row not read can introduce
unpredictable delays.
- Up 1/3 of power drawn is used for refresh.
Newer, smaller cells.
+ denser.
+ less power.
- refresh more often.
- stronger signal amplifier circuits.
Use
Main memory.