The main memory representation broken into to tables to fit on the screen/page. Addresses and contents of cells are expressed as hexadecimal values.

	Segment 0								Segment 1								Segment 2								Segment 3
	Line 0		Line 1		Line 2		Line 3		Line 0		Line 1		Line 2		Line 3		Line 0		Line 1		Line 2		Line 3		Line 0		Line 1		Line 2		Line 3
Mem Addr	00	01	02	03	04	05	06	07	08	09	0a	0b	0c	0d	0e	0f	10	11	12	13	14	15	16	17	18	19	1a	1b	1c	1d	1e	1f
Data	37	01	f4	1b	17	b0	22	01	05	0b	e2	dc	b8	35	92	29

Segment 4

Segment 5

Segment 6

Segment 7

Line 0

Line 1

Line 2

Line 3

Line 0

Line 1

Line 2

Line 3

Line 0

Line 1

Line 2

Line 3

Line 0

Line 1

Line 2

Line 3

Mem Addr

20

21

22

23

24

25

26

27

28

29

2a

2b

2c

2d

2e

2f

30

31

32

33

34

35

36

37

38

39

3a

3b

3c

3d

3e

3f

Data

2b

b2

b4

4b

a1

7c

c4

de

aa

bb

cc

dd

The data cache is 2 cells by 4 lines, each cell holds 1 byte of data. But, because it is 2-way set associative, there are two instances of the cache.

Only data is cached in this example (not instuctions).

Empty cache Click to see 2-way cache in action.	LDA $00 - Miss - 37	ADC $0A - Miss - e2	SBC $22 - Miss - b4
	00h = 00000 00 0b tag = 0, line = 0, byte = 0	0Ah = 00001 01 0b tag = 1, line = 1, byte = 0	22h = 00100 01 0b tag = 4, line = 1, byte = 0
Line Tag  Data  03       02       01       00       03       02       01       00       Grey not part of cache	Line Tag  Data  03       02       01       00       03       02       01       00 0 37 01 Grey not part of cache	Line Tag  Data  03       02       01       00       03       02       01 1 e2 dc 00 0 37 01 Grey not part of cache	Line Tag  Data  03       02       01 4 b4 a1 00       03       02       01 1 e2 dc 00 0 37 01 Grey not part of cache

LDA $01 - Hit - 01	ADC $0B - Hit - dc	STA $23 - Hit - 4b
01h = 00000 00 1b tag = 0, line = 0, byte = 1	0Bh = 00001 01 1b tag = 1, line = 1, byte = 1	23h = 00100 01 1b tag = 4, line = 1, byte = 1
Line Tag  Data  03       02       01 4 b4 4b 00       03       02       01 1 e2 dc 00 0 37 01 Grey not part of cache	Line Tag  Data  03       02       01 4 b4 4b 00       03       02       01 1 e2 dc 00 0 37 01 Grey not part of cache	Line Tag  Data  03       02       01 4 b4 4b 00       03       02       01 1 e2 dc 00 0 37 01 Grey not part of cache

LDA $02 - Miss - f4	ADC $0C - Miss - b8	SBC $24 - Miss - a1
02h = 00000 01 0b tag = 0, line = 1, byte = 0	0Ch = 00001 10 0b tag = 1, line = 2, byte = 0	24h = 00100 10 0b tag = 4, line = 2, byte = 0
Line Tag  Data  03       02       01 4 b4 4b 00       03       02       01 0 f4 1b 00 0 37 01 Grey not part of cache	Line Tag  Data  03       02       01 4 b4 4b 00       03       02 1 b8 35 01 0 f4 1b 00 0 37 01 Grey not part of cache	Line Tag  Data  03       02 4 a1 7c 01 4 b4 4b 00       03       02 1 b8 35 01 0 f4 1b 00 0 37 01 Grey not part of cache

ADC $03 - Hit - 1b	ADC $0D - Hit - 35	SBC $25 - Hit - 7c
03h = 00000 01 1b tag = 0, line = 1, byte = 1	0Dh = 00001 10 1b tag = 1, line = 2, byte = 1	25h = 00100 10 1b tag = 4, line = 2, byte = 1
Line Tag  Data  03       02 4 a1 7c 01 4 b4 4b 00       03       02 1 b8 35 01 0 f4 1b 00 0 37 01 Grey not part of cache	Line Tag  Data  03       02 4 a1 7c 01 4 b4 4b 00       03       02 1 b8 35 01 0 f4 1b 00 0 37 01 Grey not part of cache	Line Tag  Data  03       02 4 a1 7c 01 4 b4 4b 00       03       02 1 b8 35 01 0 f4 1b 00 0 37 01 Grey not part of cache