Scaled - form of indexing.
  Effective address is found by adding the contents of a specified index
    register multiplied by a constant to a specified direct or indirect address.

  Supposed there is an array of 4 byte values. With standard indexing, index
  must be adjusted by 4 bytes each time.

  With scaling, index incremented by 1 but EA = Start @ + (index * 4).

  ARM : LDR R0, [R1, R2, LSL #2] 
    R0 - destination, R1 - base(indirect) register, R2 - index, LSL #2 (x4)
     
  Auto-adjust - rather than using an index, uses just a base register and
    updates base by scalar each time executed. May support increment or 
    decrement.

  LDR R0, [R1], #4
    R0 - destination, R1 - base register, #4 - amount to increment R1 by.


* SIMD instructions (vector processor).
   Single Instruction Multiple Data.
 
   SIMD is a form of parallel processing where a single instruction is
     applied to multiple work units of data.

   Commonly the instruction will list a single address as a target but 
     the CPU will actually apply the instruction across multiple words 
     of data in parallel. 

   Intel MMU support - 4 words of data.

   On various super-computers, you may be allowed to indicate the number of
     work units by an additional operand.

  Check out : https://arstechnica.com/features/2000/03/simd/