Register
  Named register[s] hold the data of interest.
    For an instruction to truely be a register based instruction,
      both source and destination specified by registers.

  All action occurs within the CPU.
  Example
    IBM360: L R1,R2

  Very fast access to data.

  May conceptually overlap with implied on simpler CPUs. 
    6502: TAY (transfer A to Y) can be also viewed as an implied because
      complete instruction is 1 byte opcode. 

  RISC architectures depend heavily on register, register activity for
    most work.
    
    ADD  R1,R2,R3 ; Add R1 and R2 and store result in R3