CPU instruction design issues.

Flow of control - instruction alters Program Counter (IP)

  Branches and Jumps
    Branches are usually condtional.

    Jumps (goto) are usually unconditional.

    Relative to current PC value.
      Operand is signed value added to PC to jump to new block of code.
      Value is usually signficantly smaller than full address range.

    Absolute address.
      Operand(s) is value writtent to PC to jump to new block of code.
      Value usually can represent any value in address range.
          
    Whether a command is a conditional jump or a branch is defined by
      the CPU's authors.    


  Functions - jump and return (user defined code).
    
    6502 - JSR
      Pushes the current PC (pointing to next instruction) onto
      stack in low/high order and sets PC to specified address. 

      RTS (return from subroutine) pops bytes off of stack, and places them
        in program counter.

    80x8 - Call
      included a number of ways to identify the target routine's address.
        near/far relative -signed offset
        near/far absolute regiser indirect - target address in register
        near/far absolute memory indirect - target address in identifyed memory
        near/far absolute address - target address in operand

      Near :
        Pushes program counter (return address) onto stack before call.

      Far :
        Pushes code segment register and program counter (return address) 
        onto stack.

      RET : return from, used different opcode for near and far.


    IBM 360 - no user stack, so stack simulated with linked list.
      * Standard linkage.
      BALR R14,R15 - branch and link - right 32-bits of PSW, next instruction's 
      address, stored in R14 and @ of target location specified by R15.  

        R0  - will hold any return code set by subroutine.
        R1  - holds a single value to be passed or the address of a list of
              parameters. Called routine decides.
        R13 - pointer to save area where subroutine can store any GPRs before
              altering them.
        R14 - return address of next instruction when execution returns from
              subroutine.
        R15 - address of subroutine.

        Subroutine will reload saved GPRs right before returning to caller.
 
      BR R14 (branch to register specified location) returns execution to @ 
      specified in R14. 

      The use of the noted registers is strictly a traditional protocol. 
      IBM 360 hardware does not restrict activity based on register choice.


   Some CPUs support conditional calls, executing call only after testing the 
     designated condition flag.

   Interrupts