System architectural views.  
  (modeled on ISO/OSI 1977  
   - international standards organization/open systems interconnection )
  a. Physical level (Digital logic). - L0
  b. Micro-architectural level. - L1
  c. Instruction set architecture. - L2
  d. Low-level programming. - L3
  e. Operating system level. - L4
  f. High-level programming. - L5
  g. Application level - L6
  h. Application level programming - L7

Physical level - L0 [CSCI 463]

  Voltage levels, signal timing and clock speeds, path distances.

  Physical materials.

  Binary, analog, multiple discrete levels (Flash memory 4 value per cell)

  Basic (atomic) logic units called gates:
    Bit level memory.

    Simple decision circuits (NAND, NOR, NOT).

  Simple functional circuits:
    Standard memory units - registers, byte or word sized memory cells.

    Simple computational units - adder circuit, comparator, shift multiplier.

Micro-architectural or control level - L1 [CSCI 463, CSCI 480]

  Gates grouped into functional units.

  Memory address registers, memory data registers, accumulators, counters, etc.

  Arithmetic Logic Unit (ALU).
    Word sized adder, multiplier, comparator.

    Instruction Decoder - logic to select calculating function.
      Reads an opcode and determines sequence of actions and registers to use.

    Memory Management Unit.  Cache, Virtual Memory control, etc.