Silicon wafers and making integrated chips.
  Creation 
    Semiconductor device fabrication
    Pure
    Pre-doped

  Photo-lithography

  Doping - creating P and N layers

  

  Etching - removal of portion of layer

  Deposition - building up additional layers or connections

Logic circuits - integrated circuits.
  a. Packaging of gates
    i. SSI - small scale integration 1 to 10 gates.
   ii. MSI - medium scale integration 10 to 100 gates.
  iii. LSI - large scale integration 100 to 100,000 gates.
   iv. VLSI - very large scale integration > 100,000 gates.
    v. XLSI - Extremely large scale integration > 1,000,000 gates.
*   Xeon phi 62-core CPU > 5 billion.

   Check out https://en.wikipedia.org/wiki/Transistor_count


Package designs
  a. Dual in-line package (dip).
    i. Pin-outs in standard units 4, 8, 16, 20, 40 (CPUs), 68
  
                              10-15 cents/each
    ii. Dual in-line flat pack.
    
    
    
Graphic License

  b. Single in-line packages
    i. Pins in a single row. Resister packs.
    
     image sources from wikipedia

  c. Single/Dual in-line modules
    i. Multiple chips in a module that fits a socket in the system. (memory)
        Often has additional support and decoder circuitry.
    
    

  d. QFP - quad flat packages (Bridge chips).  up to 144 pins.
    

  e. PGA - pin grid arrays (Most modern CPUs). up to 940 pins.
      Pins come out of the bottom of the chip.
     
    
     40-pin ~ $3.50/each
    370-pin ~ $6/each

  f. Other

Boolean