CPU's internal bus system.  
  Required to transmit signals between circuits in the CPU.
  Two sub-categories
    Control bus - used to maintain the CPU
      Clock for synchronization.
      Interrupt transmission.
      Other overhead signals.

    Datapath - connects the circuits needed to transfer and manipulate
    data specified by a task command.

Datapath
  Consists of 
    Arithmetic logic unit (ALU)
    Control register
    Data transfer registers 
      Data storage
      Addressing

Synchronous timing and fetch execute (von Neumann) cycle.
  Fetch/execute cycle

  Clock used to ensure that circuits a stable state between each step of
  the fetch execute cycle.

Single path data-path - Basic von Neumann design
  von Neumann bottleneck - limit to 1 CPU sub-task at a time.
  

Multi-path - Pipe-lining and Super-scalar.
  
  Simple pipe-ling
    Multiple instructions in CPU
    Different steps of the F/E cycle being processed on different instructions.
   
  Parallel pipeline
    Duplicate circuits in CPU allow CPU to process 2 instructions at once.
    Certain overhead circuits not duplicated.

  Super-scalar
    Because certain circuits function much more quickly than others,
    only the slower circuits paralleled.

    Often not true parallel.
      Rather one integer and one floating point ALUs
     
    Less competition for same resources.