Buses and Ports.
  Legacy serial port. 

  Legacy parallel port.

  IEEE 448 Parallel bus.

  XT and AT (PC) bus - original bus for the IBM PC.

  ISA (Industry Standard Architecture) - generic version of PC bus.

  EISA (Extended) - wider data bus, improved speed and control.

  MCA (Micro-channel architecture) - wider bus, improved speed and control.
       (Proprietary - required licensing from IBM).

  Local bus - VLB (VESA video local bus) - often closer to a port. Used to 
    connect video card and/or cache to CPU memory. Often proprietary. 

  PCI (Peripheral Component Interconnect) - wider, faster, greatly
       improved control. Protocol public but Intel manufactures most of
       the logic chips needed to make it work.

  AGP (modified PCI) - used to connect a small number of time/data
       critical devices. (Replace VLB).

  USB (universal serial bus) - simple physical bus using serial interface 
    (1 send/ 1 receive) and multi-tasks lines for most bus functions. 
    When power provided, 2 additional lines used.

  Fire-wire - serial bus (SCSI). Independent of specific devices.


Ports
  Serial - sends one bit at a time and may have up to 8 control lines.

  Parallel printer
    Centronics - original PC printer connection. Unidirectional.

    IEEE 1284 - major upgrade of Centronics.

Serial
  Legacy (com1 com2)
  1 transmit line.
  1 receive line.
  Handshake lines (0-7?).
  Ground
  Shield
  Very slow 120 Baud (part of which was timing/error)
    Eventually > 24000 Baud 

Parallel
  Legacy parallel "Centronics" port. (SPP)
  4 control lines
  5 status lines
  8 uni-directional data lines
  8 ground lines
  150 kilobytes/sec

SPP improvements
  Reverse - has to be supported by software.
    Nibble mode - 4 bit reverse data transfer using status lines for data
       transfer. Supportable with "Centronics" ports.

    Byte mode - Hardware manufacturers redesigned ports to allow software 
       to disable the data output driver circuits and reverse data direction. 
       Late model "Centronics" ports.
    
Bidirectional EPP
  EPP - Enhanced parallel port (Pre 1284)
    Four modes of data transfer
      Data write cycle

      Data read cycle

      Address write cycle

      Address read cycle
        Addresses
        Channel - distinguish function in a fax/modem/printer. 
        Commands
        Control.

    Mixed hardware & software support.
    
IEEE 1284 - bidirectional ECP
  ECP - extended capacity port

  Supports addressing, bidirectional data transfers, channels, commands, 
    status.

  Can access printer and modem simultaneously.

  Controller has dedicated registers for the various functions.

IEEE 1284
  Current systems support IEEE 1284 parallel port.

  Usually CMOS configured.

  > 1 MB/sec

  5 modes
    Forward direction.
      Compatibility mode - "Centronics" - forward direction only.

    Reverse.
      Nibble mode.
      Byte mode.

    Bi-directional
      EPP (slight improvement over original).
      ECP

Buses

IEEE 448 (CBM specs)
  Parallel protocol (technical devices).
  Handles multiple devices and bi-directional. 
  Popular with research scientists and their devices. 
  8 Data lines
  8 Ground lines
  5 Interface management lines (control)
  3 Handshake lines

  15 devices possible on bus
    Address hardwired on each device (switches).

  Data lines used for both device addressing and data transfer.  
  
  Devices can be controller, talker, and/or listener.

  Only one controller can be in control at a time.
    Controller can pass on control to another controller.
   
  Controller initiates all activity between talkers and listeners.
    By specifying their device addresses on data bus.

AT Bus
  8/16 bit data.
  20 bit address. 
  6/8 MHz.
  Additional interrupt lines.
   
ISA (Industry Standard Architecture) Bus
  Based on the PC (XT) bus.  

  8 bit data.
  20 bit address. 
  4.7 MHz initially.
  7 interrupt lines
  +/- 5 Volt for interface circuitry.
  +/- 12 Volt to drive mechanical devices such as floppies.
  Clock Finalized at 8.33 MHz
  Capable of up to 8.33MB/sec transfer.
  Clock, I/O, R/W, handshaking, etc.
  62 connections.

ISA (AT)
  16 bit data.
  20 bit address. 
  8.333 MHz initially.

  Interface slots were expanded but were backwards compatible.
    ============= ======
    XT            AT extensions

  Additional 7 interrupts. (only accessible via the extension slot)
  Clock Finalized at 8.33 MHz
  Capable of up to 8.33MB/sec transfer.
  Added 36 connections for a total of 98.

MCA Micro-channel 
  32 bit data.

  Bus mastering.

  Plug and Play - cards no longer needed jumpers. 
  
  Different (smaller) interface layout. Not backwards compatible.

  IBM enforced its proprietary design with fees.

EISA (extended ISA)
  32 bit data.

  Bus mastering.

  ISA compatible.
    Slot is bi-level and ISA cards set deeper in slot to seat on the
    correct connectors.

  55 additional signals and 35 grounds.
 
  Plug and Play - cards no longer needed jumpers. 

  Open standard.

  More expensive than ISA
    And was shortly replaced by local buses such as PCI or VLB. 

  33 MB/s throughput.

VL-Bus (Vesa local bus)
  Once CPU > 8MHz., it was separated from the i/o bus. 

  VL-Bus is an expansion of the ISA bus (again).

  Faster.
    Used for memory and video access.

    Standard ISA still existed on the system.

  32 bit data bus.

  133MB/s throughput.

  Tied into the 486 CPU and used the processor bus directly.

  Weak standard - tended to vary with manufacturer.

  VESA Local bus. - (video electronics standard association)
    VL-bus with a more consistent standard.
    1992-1994
    Modeled after EISA
  
  112 contacts (many were ground to guard against data corruption).


PCI
  1992 

  Intel driven

  Standard public but Intel holds patents on chips that implement protocols
  on motherboard.

  Evolved over a 10 year period.

  32 bit data bus.
  33.33 MHz bus.
  133 MBps throughput.
  Supports both 5V and 3.3V protocols.
  Supports PNP.

  Burst mode.  Once transfer started, bus can provide address control.

  Faster versions - 64 bit and faster clocks, but not in PCs.
  
PCI Express (2002)
  Faster - 1, 16, 32 bit bus.
    Opposite direction data lines paired up using differential signaling.
      Called lanes.

    So treated as lanes of serial data buses.

  2500 MHz - up to 8000MB/s (sum of both directions). 
  0.8V signal.

AGP - advanced graphics port.
  Not a bus - only one device (video card).

  Based on the PCI protocols.
    32 bit x 66MHz  266 MB/sec

  66 MHz (new versions use doubling of data transfer).
    2x 4x and 8x    8x capable of 2133MB/sec

  Also supports 3.3 and 1.5 Volt cards. 
    (cards keyed to fit correct interface).
 
  Although designed to share standard memory
    Most current boards have their own high speed memory.
    Up to 256MB. 
  
USB - universal serial bus
  Serial bus.
  USB 1 (1.1) 12 Mb/s or 1.5 MB/s. (slower mode 187.5 KB/s - keyboards).
  Capable of 127 devices - daisy chained.
  Cable connectors keyed (shaped) to go in one way.
    Styles
    A - flat - from PC or hub.
    B or mini - to device which may be an extension hub. 

  Cable lengths limited to 5M for high speed and 3M for low.
  Hubs can be used to extend distance.
    Limit of 5 hubs daisy-chained. Max of 30M.

  4 wire cable
    Pair of transmit/receive data lines
    Power/Ground for low power devices (5 volt).

  Data lines used to transmit address, data, and control info.
  
  Plug and Play - auto-configured on the fly.
  Hot swappable - all devices can be on when connecting.  
  Requires support of OS.
  USB 2.0 480 Mb/s or 120MB/s.  Backwards compatible.
  Requires a controller card (primary hub).
  PC capable of multiple independent hubs.
    Two PCs cannot be hooked together with only USB.

USB Actions
  New device ids itself as @0
  Hub then assigns an available address to it.
  Each device can have up to 16 logical data pipes or channels.
  Root hub generates a clock frame once a second +/- 0.05 m-sec.
  Communication between hub and devices done by frames.
    
USB Frames
  Frames consist of 1 or more packets.

  Frames can be viewed as a bi-directional session.

  All frames are initiated by hub.

  Subsequent packets within the frame can move between hub and device in 
    either direction depending on specific activity.

Four general types of frames.
  Control - configure devices, give commands, check status.

  Isochronous - used with time sensitive devices - phones, sound. Precise
    time intervals but no re-transmit on error.

  Bulk - large data transfers to/from non-time sensitive devices
    e.g printers,  Zip drives.

  Interrupt - USB does not support device initiated interrupts. Master hub
    polls devices for attention need (50 m-sec).

Frame contains one or more packets of one or more of four packet types

  Token - from root
    SOF - start of frame.
    IN - poll packet asks device to return certain data.
    OUT - announces that data will be sent to device.
    SETUP - used for configuration.

  Data - bidirectional, up to 64 bytes at a time.
    Sync field 8-bit.
    Packet type id 8-bit.
    Data being moved.
    CRC cyclic redundancy check 16-byte.

  Three types of handshaking
    ACK - previous data packet correctly received.
    NAK - error (CRC error detected).
    STALL - busy (wait).

Fire-wire IEEE 1394 (?)
  Based on SCSI 
  Owned by Apple
  Any two or more devices can be connected (no computer required).
  Auto-negotiation of bus master.
  100-400 Mb/s