Topics for 3rd test

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Bus

4 Major function catagories.
  Power, Address, Data, Control  

Comparing features of :

  IEEE 488 asyhchronous bus

  ISA (PC) bus

  PCI, Peripheral Component Interconnect bus

  PCI-e 

  PATA/SATA - serial and parallel ATA bus.

Pay attention to :
  Number of physical lines. 
 
  Number of physical/logical lines set aside for address and data.
    Are lines virtual - is both data and addressing transfered on 
    same lines at different times?

  Serial or parallel construct.
    Lanes and lines 
      Lines - actual physical lines

      Lanes - set of lines for transfering 1 stream of bits. Each lane 
        is independent of other lanes.

      PCIe uses 2 lines per lane  - data can move in either direction.

      SATA uses 2 pairs of lines (4), each pair is unidirectional, one 
        pair for transmitting and one for receiving.

  Data throughput. 


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Determine the Tag, Line, and Byte ids of a given memory access.


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Given an actual cache and a program that performs a series of memory accesses,
be able to show contents of the cache as the program executes for direct and
2-way set associative.

The following pages contain links to example caches :

Direct
N-way
 


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Associative and set associative caches provide an improved alternative to
direct cacheing. They allow data to be mapped to one of several alternative
lines in the cache.  However, if cache is full, you must choose which cache 
line to free.

Name (full name, not just abreviation) three mechanisms/rules that can be 
used to select the cache to replace. 

Line selection