CSCI 463 Spring 2018 Test 2 Name ________________ Z-Id _________________ 1. Boolean :(10) Match the rule name to the rule expression. Only one rule applies to an expression. Not all rules may be expressed, and more than one expression may be an example of a rule. Some statements may be incorrect. If so, Use invalid choice. A. Identity B. Null C. Idempotent D. Inverse (Complement) E. Distribution F. DeMorgan G. Cancellation H. Invalid. ____ A*C*D+(B+1)*C*D = A*C*D+1*B*C*D ____ (A+!A)(B+C) = 1*(B+C) ____ A+B+!!(C+D) = A+B+(C+D) ____ (A+B)*(A+B) = A+B ____ A*C*D+B*C*D+C*D = A*C*D+B*C*D+1*C*D ____ A+B*C=(A+B)*(A+C) ____ A*(!B+!C) = A*!B+A*!C ____ 0+(B+C) = A+(B+C)+!A 2.(4) These statements may use multiple rules to go from left side to right side. Some may be wrong. Use I. for wrong or invalid. Use V. for correct or valid. ____ (A+B+!!(C*D)) = (A+B+C+D) ____ !(!A*B)*C = A+!B*C ____ !A+B = !(A*!B) ____ A*(1+C)+C = A+C 3.(9) Draw the gate structure for following boolean statement. Use the one keyed to the a certain digit of your Z-ID. Label your inputs. Be neat. (A*B)+!(A+B)+(!A*C) (!A*B)+!(A+B)+(!A*C) (A*B)+!(A*B)+(!A*C) (A*B)+!(A+B)+(!A*!C) (A*!B)+!(A+B)+(!A*C) (A*B)+!(A+B)+(!A*!C) (!A*B)+!(A+B)*(!A*C) (A*B)+!(A*B)*(!A*C) (A+B)+!(A*B)+(!A*!C) (A*!B)+!(A+B)+(!A*!C) 4.(8) Solve truth table for selected boolean statement. Use the one keyed to a certain digit of your Z-ID. Hint : Plug in values and solve. A | B | C | --------------------------------------------------------------------- 0 | 0 | 0 | --------------------------------------------------------------------- 0 | 0 | 1 | --------------------------------------------------------------------- 0 | 1 | 0 | --------------------------------------------------------------------- 0 | 1 | 1 | --------------------------------------------------------------------- 1 | 0 | 0 | --------------------------------------------------------------------- 1 | 0 | 1 | --------------------------------------------------------------------- 1 | 1 | 0 | --------------------------------------------------------------------- 1 | 1 | 1 | --------------------------------------------------------------------- 5. ROM properties. (10 points) - more than one match possible for some features but pick only one. A. Mask ROM B. Programmable ROM C. EPROM D. EEPROM E. Flash ROM F. EDO-RAM G. BEDO-RAM H. SDRAM I. Magnetic core J. Fast Page Ram K. Dynamic Ram L. Static Ram ____ Memory controller specifies single row address followed by up to 4 column addresses to provide improved read speed. Data read/write completed before next column addressed. ____ "Programmed" by repeated exposing different parts of the semiconductor material to different chemicals resulting in 'bits' and connections being permanently created in the surface of the chip. ____ Destructive read, but can maintain store value even without power. ____ Uses either NOR gate technology which can be read like ram memory (byte addressable) or NAND gate technology which is read at block level like a hard drive. ____ Uses burnable "fuses" that can be blown to set bit to "zero". Technology also used in programmable logic arrays. ____ Uses transistor flip-flops requiring constant power to keep stored bit. ____ Erasable using ultraviolet light. ____ Uses very small capacitor storage cells requiring regular refresh of the stored bit. ____ Programmable and erasable at the byte level using a higher than working level ____ Uses isolated floating gate to set/clear bit. ____ Allows controller to specify a single row address followed by up to 4 column addresses to provide improved read speed. Memory controller addresses next column while data read/writes completes. ____ Provides the densest read-only memory storage. ____ Provides the densest read/write memory storage. ____ Can access an additional for memory cells on current row before refresh needed. Column sequencing handled by logic on memory chip. ____ Can perform up to 8 reads from currently select row before refresh required. Also, allows access to rows in other banks while a particular row is being refreshed. 6. (5) Give the pseudo-code for the generic fetch/execute algorithm. 7.(8) Draw a half adder, label its inputs and outputs. Give its truth table. Hint do the truth table first. Inputs - A and B, outputs - S(um) and C(carry)