Bus uses packet based communication.
bus uses NRZ signaling.
Bus uses NRZI signaling.
Bus supports burst mode transmission.
Bus uses RLL encoding.
Bus allows or provides for bus mastering.
Bus interfaced logic can signal interrupt request an any time.
Bus multiplexes address, data, and control over same lines.
Bus uses differential signaling on its data lines.
Bus uses reflected wave signaling on its data lines.
Bus uses single end point signaling for its data lines.
Bus uses bit stuffing.
Bus uses single serial bidirectional data link.
Bus has separate pairs of unidirectional serial data connections(paths), but only one of each.
Bus uses serial communication but supports multiple serial lanes, but transmits individual bytes on individual paths or lanes.
Bus uses variable width bus, individual bits of bytes distributed across available lines or lanes.
Bus has a dedicated clock line or signal.