2 4-bit signed values. So we will shift a total of 4 times. 7, -5 7 0111 Multiplicand -7 1001 two's complement of multiplicand -5 1011 Multiplier A 0111 0000 0 S 1001 0000 0 P 0000 1011 0 P 0000 1011 0 last 2 bits are 1 0, so add S to P 1001 0000 0 add 1001 0000 ------------ 1001 1011 0 total P1 1100 1101 1 shift right arithmetic. P1 1100 1101 1 last 2 bits are 1 1, no math 0 ------------ 1100 1101 1 total P2 1110 0110 1 shift right arithmetic P2 1110 0110 1 last 2 bits are 0 1, so add A to P 0111 0000 0 add 0111 0000 ------------ 0101 0110 1 total # note that bit carried out is lost. P3 0010 1011 0 shift right arithmetic P3 0010 1011 0 last 2 bits are 1 0, so add S to P 1001 0000 0 add 1001 0000 ------------- 1011 1011 0 total P4 1101 1101 1 shift right arithmetic 1101 1101 1101 1101 Take two's comp. to check. 0010 0010 1 --------- 0010 0011 32 + 2 + 1