Wafer connector - 15 pin
Power distributed in 3 pin groups to provide full amperage
3 pins - 3.5 volt (not always implemented)
3 pins - 5 volt
3 pins - 12 volt
5 ground pins
Power pins are staggered so that "hot plugging" connects certain
power and ground first.
Laptop connector - smaller/fewer pins.
Micro connector - smaller/fewer pins for 1.8 drives..
Data connectors - 7 pin, 4 data (2 lane x 2 line), 3 ground.
Single sided.
Available in a variety of colors.
Available with head bent in different directons or not at all.
Device interface.
SATA follows the network Physical, link, transport, application layered
protocol.
Physical layer :
Serial ATA is based on point to point, one device per interface with
controller although controller may interface with several devices.
Does not support routing.
But multiplier (mux/demux) available
bandwidth split between active devices.
Data is sent serially over using 8b/10b RLL, and differential signaling.
This provides timing independent to how data was delivered to the
interface controller from the rest of the system.
Some of the unassigned 8b/10b bit sequences used to sync the clocks of the
controller and target or transmit control information to the link or
transport layer.
Each drive connection done via a point to point "port".
Each port consists of a pair of "lanes".
Each lane use LVDS low voltage (+/-.25 Volts) differential signaling.
The protocol allows full-duplex, data transmission in different directions
on the different pairs of lines.
Commonly used to send status information back as data is transferred.
However, SATA almost always performs in half-duplex mode for data transfer,
most likely because you can't read and write to a storage device
at the same time.
Early versions of SATA serialized the Parallel ATA protocols.
AHCI - advanced host controller interface.
An additional protocol based on SCSI
Provides hot plugging.
NCQ - native command queuing - This allows the SATA host interface to
rearrange and interleave disk access commands to get the best
performance out of the drive or drives.
Requires OS (Vista and newer Linux) and BIOS cooperation. If not present,
controllers capable of behaving like standard PATA interface.
Number of available ports limited by the design of the interface chip/card.
3-4 ports on a consumer mother board are common.
SATA controller is capable of interfacing with 128 devices,
most likely not practical.
SATA rev 1 - 1.5 Gb/s uses 8b/10b encoding, data 80% of transmission
150MB/s which exceeds the 133MB/s throughput of PATA
and the 127MB/s that most hard drives can physically deliver currently.
SATA rev 2 - 3 Gb/s is faster than any mechanical hard-drive available.
300 MB/s data transfer possible.
Solid state "hard-drives" need at least this for optimal use.
SATA rev 3 - 6 Gb/s (600 MB/s actual data transfer).
Latest SSDs and controllers need this.
Also magnetic drives with large caches.
SATA rev 3.2 - 16 Gb/s (1969 MB/s data transfer)
Supports M2 - mini-PCI form.
* Many newer SAS (Serial SCSI) controllers can talk down to a SATA drive.
How SATA works Layers Application/driver - software attempting communicate with storage device or storage device logic attempting to respond. This can be actual data being moved. Or control/addressing information accessing target device or responding to a request. Transport layer. Data or control information to be transmitted is packetized into frames. Smallest unit of data transmission is DWORD (4 bytes). Called Frame Information Structures (FIS) The Frame Information Structure (FIS) is the block of data words being transmitted. The data in the frame may be address(CHS), control/command information for the drive controller, status information for drive or controler, or data being moved. Not the concern of the SATA interface. Link layer. Insertion of control characters. Not part of the packet but provide link level control/status communication between sender and receiver link level logic. SATA has a library of communication objects called primitives. consist of one of 18 unique values padded with 3 additional bytes to form a DWORD. Primitives are used signal control and status of the connecton, maintain the active state of the connnection, or encapsulate data being transmitted in a frame (SATA's version of a packet) Unless a device goes into power save mode, once a link is activated, the 2 endpoints continuously transmit primitives or frames, keeping the two ends synchronized. A frame of data consists of SOF|FIS|CRC|EOF SOF - Start of frame FIS - Frame information structure CRC - Cyclic redundency check EOF - End of frame A number of the primitives are stand-alone and are transmitted independent of a FIS, as needed. Sequence of prep of a frame. A dword of data is used in the CRC calculation. It is then scrambled. It then goes through 8b/10b encoding. Primitives to encapsulate the FIS and the CRC are not scrambled. Short runs of other primitives are also not scrambled. However if a long sequence of a particular primitive is being sent, SATA requires they be scrambled. Finally, Serialization of encoded bytes.
Physical layer. NRZ/differential signaling. Out of band transmission and detection. Out of band signaling (OOB). When transmitting information, SATA is NRZ. However, when not in use, lines allowed to return to a neutral state. And the attached device can go into a power save mode. OOB uses a non-standard signaling of the line pair to 'wake' the targeted SATA interface and device. Speed negotiation, most SATA controllers are backwards compatible with the older SATA versions.