Register Memory
 XT mother board 
 PCI mother board 

CPU Micro-architecture - circuits grouped to perform programming tasks
   such as adding or manipulating data.

Logic circuits
  Timing control - synchronizes all activity in cpu.
    Overcomes issues of latency.

  Arithmetic logic unit (alu) - basic computations.
    Specific tasks available are determined by specific cpu design.

  Instruction decoder - interprets and implements instructions.

  Interrupt logic.
    Handles special system conditions that require pauses in normal task 

Registers - Used as scratch or holding area for the assigned tasks.
  Visible - registers either directly or indirectly accessable to the 
    user via the instruction set architecture of the specific cpu.

  Invisible - used internally to complete the tasks at hand. 

Registers (addressing)
  MAR - memory address register used to hold memory address being accessed.

  PC - program counter indicates next instruction to be executed.

  SP - stack pointer points to a memory scratch area, first in last out.
  not implemented on all cpus.

Registers (functional)
  MDR(MBR) - memory data(buffer) used to move data between cpu and data bus.

  IR - instruction register holds current instruction being decoded.

  GPR - General purpose registers used to hold data being manipulated,
        all register have equal status.

  DPR - Designated purpose registers used with specific commands or for
        specific functions.
          Floating point registers,  Counters.

Status register
  CCR - Condition code or status register.
    Flags record the result of action, influences action of the cpu, or both.

  Different cpu designs have different numbers and types of flags.

6502 (Apple, Atari, Commodore) Registers

  6-bit program counter, memory address register (address bus)

  8-bit memory data register (data bus)

  8-bit Stack pointer ( hard wired to a specific 256 byte block).

  8-bit Instruction register.

  8-bit general purpose register called the accumulator.

  2 8-bit index registers called x and y.

  8-bit peripheral interface port.

  8-bit status register.
      Sign flag, Zero flag, Carry flag
      Overflow - result of signed action carried or borrowed.

      Interrupt mask - mask "ignore" ignorable interrupts.
        Already handling an interrupt.

      Decimal mode - cause instructions to perform BCD.
        Modifies the interpretation of the sign and carry flags.

  Internal registers (non-user).

808X (Intel) Registers
8088 CPU  8086 Block Diagram
  4 16-bit General purpose registers.
    Also assigned specific functions or paired with certain actions.
    A - accumulator, B, C - counter, D
    Also addressable at the byte level AH,AL, etc.

  4 16-bit dedicated purpose address registers.
    SP - stack pointer (user programmable).
    BP - base pointer (used to with blocks of data).
    SI - source index (used by specific commands with DI to move blocks of data)
    DI - destination index

  20-bit (multiplexed) memory address register.

    16-bit instruction pointer (combined with CS register * 4)

    4 16 bit segment registers.
      Used to address memory in 64 KB blocks on 6 byte boundaries.
      Combined with GP registers for a complete address.
      CS - code segment
      DS - data segment
      SS - stack segment
      ES - extra segment (usually used with DS )

  16-bit Condition register 
    Status flags
      Carry flag - carry or borrow for unsigned number.

      Auxiliary carry flag - monitors lowest 4 bits of accumulator, used for 
      bcd carry.

      Overflow flag - carry or borrow for a signed number.

      Sign flag - result of an action created a negative value.

      Zero flag - result of an action was zero or equal.

      Parity flag - action detected an even or odd parity.

    Control flags
      Direction flag - determines index direction of a looping instruction, 
      up or down.

      Interrupt enable flag - block or accept maskable interrupts.

      Trap flag - causes cpu to pause between commands (debugging)

IBM 360
  16 General purpose registers -  R0 has special rules as an address register.

  4 Floating point registers R0 R2 R4 R6 
   - 32 bit short, 64 bit, or addressed as 128 bit even/odd pairs.

  Program status word - is a combination of condition code register,
  instruction pointer, and program status register.

    Channel masks - masks requests from channel devices.

    External mask - masks interrupts from other external devices.

    PSW key - used to protect blocks of memory in multi-tasking sysems.

    BC/EC mode - indicates if program is running in 24 bit legacy mode
    or newer 3 bit mode.

    Machine check mask - masks or accepts hardware problem interrupts.

    Wait state - pauses cpu while waiting for channel devices to respond.
    (Improper use of flag can lock up machine.)

    Problem state - indicates supervisor (os) or problem (user's program).
      Allows or restricts execution of certain instructions.

    Interrupt code - records the interrupt id code generated, Soc 4
      IBM 360 supports 2, 4, 6, and 8 bit instructions.

    Instruction length code - length of instruction just executed.

    Condition code - 2 bits wide - used to record status of an aritmetic
    action. 00 = 0, 0 < zero, 10 >  zero, 11 overflow or error.

    Program masks - masks user handlable interrupts. Fixed point overflow,
    decimal overflow, exponent underflow, significance.

    Instruction address (PC)

Z8 - Microcon\troller
  Program memory, both internal and externally addressable. 
    Internal can be ROM (permanent program)

  Only externally addresasble data memory.
    (NOT a von Neumann design)

  Has a stack style internal register file. 
  124 general purpose registers.
    used as accumulator, address pointer, or index. 

  16 CPU and peripheral control registers.

  4 I/O port registers.